[gtksourceview] Update Verilog language by Ben James. See bug #628246.

From: Ignacio Casal Quinteiro <icq src gnome org>
To: commits-list gnome org
Cc:
Subject: [gtksourceview] Update Verilog language by Ben James. See bug #628246.
Date: Sun, 29 Aug 2010 18:44:27 +0000 (UTC)
commit d7e1ffe95c3ad82071cf9665c5f65c93c5d04d4d
Author: Ignacio Casal Quinteiro <icq gnome org>
Date:   Sun Aug 29 20:42:57 2010 +0200

    Update Verilog language by Ben James. See bug #628246.

 data/language-specs/verilog.lang |  220 +++++++++++++++++++++++++++++++++++++-
 1 files changed, 217 insertions(+), 3 deletions(-)
---
diff --git a/data/language-specs/verilog.lang b/data/language-specs/verilog.lang
index c92c810..46b803b 100644
--- a/data/language-specs/verilog.lang
+++ b/data/language-specs/verilog.lang
@@ -32,12 +32,18 @@
 
   <styles>
     <style id="comment" _name="Comment" map-to="def:comment"/>
+    <style id="string" _name="String" map-to="def:string"/>
+    <style id="escaped-character" _name="Escaped Character" map-to="def:special-char"/>
     <style id="error" _name="Error" map-to="def:error"/>
     <style id="compiler-directive" _name="Compiler Directive" map-to="def:preprocessor"/>
+    <style id="ieee-system-task" _name="IEEE System Task" map-to="def:keyword"/>
+    <style id="lrm-additional-system-task" _name="LRM Additional System Task" map-to="def:keyword"/>
     <style id="keyword" _name="Keyword" map-to="def:keyword"/>
     <style id="gate" _name="Gate" map-to="def:keyword"/>
     <style id="type" _name="Type" map-to="def:type"/>
     <style id="base-n-integer" _name="Base-N Integer" map-to="def:base-n-integer"/>
+    <style id="real-number" _name="Real number" map-to="def:floating-point"/>
+    <style id="integer-number" _name="Integer Number" map-to="def:number"/>
   </styles>
 
   <definitions>
@@ -61,6 +67,23 @@
       <match>\*/(?!\*)</match>
     </context>
 
+    <define-regex id="escaped-character" extended="true">
+      \\(                   # leading backslash
+      [\\\"\'nt]            # escaped character
+      )
+    </define-regex>
+
+    <context id="string" style-ref="string" end-at-line-end="true" class="string" class-disabled="no-spell-check">
+      <start>"</start>
+      <end>"</end>
+      <include>
+        <context id="escaped-character" style-ref="escaped-character">
+          <match>\%{escaped-character}</match>
+        </context>
+        <context ref="def:line-continue"/>
+      </include>
+    </context>
+
     <context id="compiler-directive" style-ref="compiler-directive">
       <prefix>`</prefix>
       <keyword>celldefine</keyword>
@@ -81,6 +104,172 @@
       <keyword>undef</keyword>
     </context>
 
+    <!-- System tasks as mandated by: IEEE Standard for Verilog Hardware Description Language (IEEE-1364-2005). -->
+    <context id="ieee-system-task" style-ref="ieee-system-task">
+      <prefix>\$</prefix>
+      <keyword>acos</keyword>
+      <keyword>acosh</keyword>
+      <keyword>asin</keyword>
+      <keyword>asinh</keyword>
+      <keyword>atan</keyword>
+      <keyword>atan2</keyword>
+      <keyword>atanh</keyword>
+      <keyword>async\$and\$array</keyword>
+      <keyword>async\$and\$plane</keyword>
+      <keyword>async\$nand\$array</keyword>
+      <keyword>async\$nand\$plane</keyword>
+      <keyword>async\$or\$array</keyword>
+      <keyword>async\$or\$plane</keyword>
+      <keyword>async\$nor\$array</keyword>
+      <keyword>async\$nor\$plane</keyword>
+      <keyword>bitstoreal</keyword>
+      <keyword>ceil</keyword>
+      <keyword>cos</keyword>
+      <keyword>cosh</keyword>
+      <keyword>clog2</keyword>
+      <keyword>display</keyword>
+      <keyword>displayb</keyword>
+      <keyword>displayh</keyword>
+      <keyword>displayo</keyword>
+      <keyword>dist_chi_square</keyword>
+      <keyword>dist_erlang</keyword>
+      <keyword>dist_exponential</keyword>
+      <keyword>dist_normal</keyword>
+      <keyword>dist_poisson</keyword>
+      <keyword>dist_t</keyword>
+      <keyword>dist_uniform</keyword>
+      <keyword>dummpall</keyword>
+      <keyword>dumpfile</keyword>
+      <keyword>dumpflush</keyword>
+      <keyword>dumplimit</keyword>
+      <keyword>dumpoff</keyword>
+      <keyword>dumpon</keyword>
+      <keyword>dumpvars</keyword>
+      <keyword>exp</keyword>
+      <keyword>fclose</keyword>
+      <keyword>fdisplay</keyword>
+      <keyword>fdisplayb</keyword>
+      <keyword>fdisplayh</keyword>
+      <keyword>fdisplayo</keyword>
+      <keyword>feof</keyword>
+      <keyword>ferror</keyword>
+      <keyword>fflush</keyword>
+      <keyword>fgetc</keyword>
+      <keyword>fgets</keyword>
+      <keyword>finish</keyword>
+      <keyword>floor</keyword>
+      <keyword>fmonitor</keyword>
+      <keyword>fmonitorb</keyword>
+      <keyword>fmonitorh</keyword>
+      <keyword>fmonitoro</keyword>
+      <keyword>fopen</keyword>
+      <keyword>fread</keyword>
+      <keyword>fscanf</keyword>
+      <keyword>fseek</keyword>
+      <keyword>fstrobe</keyword>
+      <keyword>fstrobeb</keyword>
+      <keyword>fstrobeh</keyword>
+      <keyword>fstrobeo</keyword>
+      <keyword>ftell</keyword>
+      <keyword>fwrite</keyword>
+      <keyword>fwriteb</keyword>
+      <keyword>fwriteh</keyword>
+      <keyword>fwriteo</keyword>
+      <keyword>hold</keyword>
+      <keyword>hypot</keyword>
+      <keyword>itor</keyword>
+      <keyword>ln</keyword>
+      <keyword>log10</keyword>
+      <keyword>monitor</keyword>
+      <keyword>monitorb</keyword>
+      <keyword>monitorh</keyword>
+      <keyword>monitoro</keyword>
+      <keyword>monitoroff</keyword>
+      <keyword>monitoron</keyword>
+      <keyword>nochange</keyword>
+      <keyword>period</keyword>
+      <keyword>pow</keyword>
+      <keyword>printtimescale</keyword>
+      <keyword>q_add</keyword>
+      <keyword>q_exam</keyword>
+      <keyword>q_full</keyword>
+      <keyword>q_initialize</keyword>
+      <keyword>q_remove</keyword>
+      <keyword>random</keyword>
+      <keyword>readmemb</keyword>
+      <keyword>readmemh</keyword>
+      <keyword>realtime</keyword>
+      <keyword>realtobits</keyword>
+      <keyword>recovery</keyword>
+      <keyword>rewind</keyword>
+      <keyword>rtoi</keyword>
+      <keyword>sdf_annotate</keyword>
+      <keyword>setup</keyword>
+      <keyword>setuphold</keyword>
+      <keyword>sformat</keyword>
+      <keyword>signed</keyword>
+      <keyword>sin</keyword>
+      <keyword>sinh</keyword>
+      <keyword>skew</keyword>
+      <keyword>sqrt</keyword>
+      <keyword>sscanf</keyword>
+      <keyword>stime</keyword>
+      <keyword>stop</keyword>
+      <keyword>strobe</keyword>
+      <keyword>strobeb</keyword>
+      <keyword>strobeh</keyword>
+      <keyword>strobeo</keyword>
+      <keyword>swrite</keyword>
+      <keyword>swriteb</keyword>
+      <keyword>swriteh</keyword>
+      <keyword>swriteo</keyword>
+      <keyword>sync\$and\$array</keyword>
+      <keyword>sync\$and\$plane</keyword>
+      <keyword>sync\$nand\$array</keyword>
+      <keyword>sync\$nand\$plane</keyword>
+      <keyword>sync\$or\$array</keyword>
+      <keyword>sync\$or\$plane</keyword>
+      <keyword>sync\$nor\$array</keyword>
+      <keyword>sync\$nor\$plane</keyword>
+      <keyword>tan</keyword>
+      <keyword>tanh</keyword>
+      <keyword>test\$plusargs</keyword>
+      <keyword>time</keyword>
+      <keyword>timeformat</keyword>
+      <keyword>ungetc</keyword>
+      <keyword>unsigned</keyword>
+      <keyword>value\$plusargs</keyword>
+      <keyword>width</keyword>
+      <keyword>write</keyword>
+      <keyword>writeb</keyword>
+      <keyword>writeh</keyword>
+      <keyword>writeo</keyword>
+    </context>
+
+    <!-- Common non-standard system functions as listed in the Doulos Verilog Golden Reference Guide. -->
+    <context id="lrm-additional-system-task" style-ref="lrm-additional-system-task">
+      <prefix>\$</prefix>
+      <keyword>countdrivers</keyword>
+      <keyword>getpattern</keyword>
+      <keyword>incsave</keyword>
+      <keyword>key</keyword>
+      <keyword>list</keyword>
+      <keyword>log</keyword>
+      <keyword>nokey</keyword>
+      <keyword>nolog</keyword>
+      <keyword>reset</keyword>
+      <keyword>reset_count</keyword>
+      <keyword>reset_value</keyword>
+      <keyword>restart</keyword>
+      <keyword>save</keyword>
+      <keyword>scale</keyword>
+      <keyword>scope</keyword>
+      <keyword>showscopes</keyword>
+      <keyword>showvars</keyword>
+      <keyword>sreadmemb</keyword>
+      <keyword>sreadmemh</keyword>
+    </context>
+
     <context id="keywords" style-ref="keyword">
       <keyword>always</keyword>
       <keyword>assign</keyword>
@@ -95,20 +284,22 @@
       <keyword>disable</keyword>
       <keyword>edge</keyword>
       <keyword>else</keyword>
+      <keyword>end</keyword>
       <keyword>endattribute</keyword>
       <keyword>endcase</keyword>
       <keyword>endfunction</keyword>
+      <keyword>endgenerate</keyword>
       <keyword>endmodule</keyword>
       <keyword>endprimitive</keyword>
       <keyword>endspecify</keyword>
       <keyword>endtable</keyword>
       <keyword>endtask</keyword>
-      <keyword>end</keyword>
+      <keyword>for</keyword>
       <keyword>force</keyword>
       <keyword>forever</keyword>
       <keyword>fork</keyword>
-      <keyword>for</keyword>
       <keyword>function</keyword>
+      <keyword>generate</keyword>
       <keyword>highz0</keyword>
       <keyword>highz1</keyword>
       <keyword>if</keyword>
@@ -173,13 +364,14 @@
 
     <context id="types" style-ref="type">
       <keyword>event</keyword>
+      <keyword>genvar</keyword>
       <keyword>inout</keyword>
       <keyword>input</keyword>
       <keyword>integer</keyword>
       <keyword>output</keyword>
       <keyword>parameter</keyword>
-      <keyword>reg</keyword>
       <keyword>real</keyword>
+      <keyword>reg</keyword>
       <keyword>realtime</keyword>
       <keyword>scalared</keyword>
       <keyword>supply0</keyword>
@@ -229,12 +421,32 @@
       </match>
     </context>
 
+    <define-regex id="exponent">[Ee][+-]?[0-9][0-9_]*</define-regex>
+    <context id="real-number" style-ref="real-number">
+      <match extended="true">
+        (?&lt;![\w\.])
+        [0-9][0-9_]*\.[0-9][0-9_]*\%{exponent}?
+        (?![\w\.])
+      </match>
+    </context>
+
+    <context id="integer-number" style-ref="integer-number">
+      <match extended="true">
+        (?&lt;![\w\.])
+        [0-9][0-9_]*(E[+]?[0-9][0-9_]*)?
+        (?![\w\.])
+      </match>
+    </context>
+
     <context id="verilog" class="no-spell-check">
       <include>
         <context ref="line-comment"/>
         <context ref="block-comment"/>
         <context ref="close-comment-outside-comment"/>
+        <context ref="string"/>
         <context ref="compiler-directive"/>
+        <context ref="ieee-system-task"/>
+        <context ref="lrm-additional-system-task"/>
         <context ref="keywords"/>
         <context ref="gates"/>
         <context ref="types"/>
@@ -242,6 +454,8 @@
         <context ref="octal-number"/>
         <context ref="decimal-number"/>
         <context ref="hexadecimal-number"/>
+        <context ref="real-number"/>
+        <context ref="integer-number"/>
       </include>
     </context>
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