[gnome-build-meta/jjardon/pinephone-pro-master: 69/71] elements/boards/pinephone-pro/u-boot.bst: Add pinephonepro config
- From: Javier Jardón <jjardon src gnome org>
- To: commits-list gnome org
- Cc:
- Subject: [gnome-build-meta/jjardon/pinephone-pro-master: 69/71] elements/boards/pinephone-pro/u-boot.bst: Add pinephonepro config
- Date: Wed, 2 Mar 2022 18:58:09 +0000 (UTC)
commit 15a35143a5d9175e1482b6ca7fb86e73cfc8b68b
Author: Javier Jardón <jjardon gnome org>
Date: Sun Jan 30 23:33:54 2022 +0000
elements/boards/pinephone-pro/u-boot.bst: Add pinephonepro config
.../boards/pinephone-pro/arm-trusted-firmware.bst | 2 +-
elements/boards/pinephone-pro/image.bst | 2 +-
elements/boards/pinephone-pro/u-boot.bst | 4 +-
...Add-initial-support-for-the-PinePhone-Pro.patch | 886 +++++++++++++++++++++
4 files changed, 891 insertions(+), 3 deletions(-)
---
diff --git a/elements/boards/pinephone-pro/arm-trusted-firmware.bst
b/elements/boards/pinephone-pro/arm-trusted-firmware.bst
index f1ac0e994..5eb205b1a 100644
--- a/elements/boards/pinephone-pro/arm-trusted-firmware.bst
+++ b/elements/boards/pinephone-pro/arm-trusted-firmware.bst
@@ -16,7 +16,7 @@ build-depends:
- boards/common/arm-none-eabi-gcc.bst
variables:
- board: pinephone_pro-rk3399
+ board: pinephone-pro-rk3399
environment:
CFLAGS: '-fno-stack-protector'
diff --git a/elements/boards/pinephone-pro/image.bst b/elements/boards/pinephone-pro/image.bst
index acd0183db..db0d015c8 100644
--- a/elements/boards/pinephone-pro/image.bst
+++ b/elements/boards/pinephone-pro/image.bst
@@ -8,7 +8,7 @@ build-depends:
variables:
linux-root: B921B045-1DF0-41C3-AF44-4C6F280D3FAE
ostree-branch: gnome-os/aarch64/pinephone-pro
- board: pinephone_pro-rk3399
+ board: pinephone-pro-rk3399
sysroot: "/sysroot"
diff --git a/elements/boards/pinephone-pro/u-boot.bst b/elements/boards/pinephone-pro/u-boot.bst
index a6855488f..d643a2a59 100644
--- a/elements/boards/pinephone-pro/u-boot.bst
+++ b/elements/boards/pinephone-pro/u-boot.bst
@@ -3,6 +3,8 @@ kind: manual
sources:
- kind: tar
url: https://source.denx.de/u-boot/u-boot/-/archive/v2021.01/u-boot-v2021.01.tar.gz
+- kind: patch
+ path: files/u-boot/0001-rockchip-Add-initial-support-for-the-PinePhone-Pro.patch
build-depends:
- freedesktop-sdk.bst:components/bison.bst
@@ -20,7 +22,7 @@ environment:
BL31: "%{indep-libdir}/u-boot/%{board}/bl31.elf"
variables:
- board: pinephone_pro-rk3399
+ board: pinephone-pro-rk3399
config:
configure-commands:
diff --git a/files/u-boot/0001-rockchip-Add-initial-support-for-the-PinePhone-Pro.patch
b/files/u-boot/0001-rockchip-Add-initial-support-for-the-PinePhone-Pro.patch
new file mode 100644
index 000000000..3dc761422
--- /dev/null
+++ b/files/u-boot/0001-rockchip-Add-initial-support-for-the-PinePhone-Pro.patch
@@ -0,0 +1,886 @@
+From: Martijn Braam <martijn brixit nl>
+Subject: [PATCH] rockchip: Add initial support for the PinePhone Pro
+Date: Thu, 21 Oct 2021 19:18:43 +0200
+
+This is a new device by PINE64 that's very similar to the Pinebook Pro
+that's already supported.
+
+Specification:
+- Rockchip RK3399
+- 4GB Dual-Channel LPDDR4
+- 128GB eMMC
+- mSD card slot
+- AP6255 for 802.11ac WiFi and Bluetooth
+- 6 inch 720*1440 DSI display
+- Quectel EG25g usb modem
+- Type-C port with alt-mode display (DP 1.2) and PD charging.
+
+Signed-off-by: Martijn Braam <martijn brixit nl>
+---
+
+ arch/arm/dts/Makefile | 1 +
+ arch/arm/dts/rk3399-pinephone-pro-u-boot.dtsi | 44 ++
+ arch/arm/dts/rk3399-pinephone-pro.dts | 520 ++++++++++++++++++
+ arch/arm/mach-rockchip/rk3399/Kconfig | 8 +
+ board/pine64/pinephone-pro-rk3399/Kconfig | 15 +
+ board/pine64/pinephone-pro-rk3399/MAINTAINERS | 8 +
+ board/pine64/pinephone-pro-rk3399/Makefile | 1 +
+ .../pinephone-pro-rk3399.c | 57 ++
+ configs/pinephone-pro-rk3399_defconfig | 92 ++++
+ include/configs/pinephone-pro-rk3399.h | 23 +
+ 10 files changed, 769 insertions(+)
+ create mode 100644 arch/arm/dts/rk3399-pinephone-pro-u-boot.dtsi
+ create mode 100644 arch/arm/dts/rk3399-pinephone-pro.dts
+ create mode 100644 board/pine64/pinephone-pro-rk3399/Kconfig
+ create mode 100644 board/pine64/pinephone-pro-rk3399/MAINTAINERS
+ create mode 100644 board/pine64/pinephone-pro-rk3399/Makefile
+ create mode 100644 board/pine64/pinephone-pro-rk3399/pinephone-pro-rk3399.c
+ create mode 100644 configs/pinephone-pro-rk3399_defconfig
+ create mode 100644 include/configs/pinephone-pro-rk3399.h
+
+diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
+index ed3d360bb1..3206370226 100644
+--- a/arch/arm/dts/Makefile
++++ b/arch/arm/dts/Makefile
+@@ -137,6 +137,7 @@ dtb-$(CONFIG_ROCKCHIP_RK3399) += \
+ rk3399-nanopi-r4s.dtb \
+ rk3399-orangepi.dtb \
+ rk3399-pinebook-pro.dtb \
++ rk3399-pinephone-pro.dtb \
+ rk3399-puma-haikou.dtb \
+ rk3399-roc-pc.dtb \
+ rk3399-roc-pc-mezzanine.dtb \
+diff --git a/arch/arm/dts/rk3399-pinephone-pro-u-boot.dtsi b/arch/arm/dts/rk3399-pinephone-pro-u-boot.dtsi
+new file mode 100644
+index 0000000000..9d44db5978
+--- /dev/null
++++ b/arch/arm/dts/rk3399-pinephone-pro-u-boot.dtsi
+@@ -0,0 +1,44 @@
++// SPDX-License-Identifier: GPL-2.0+
++/*
++ * Copyright (C) 2019 Peter Robinson <pbrobinson at gmail.com>
++ * Copyright (C) 2021 Martijn Braam <martijn at brixit.nl>
++ */
++
++#include "rk3399-u-boot.dtsi"
++#include "rk3399-sdram-lpddr4-100.dtsi"
++
++/ {
++ aliases {
++ spi0 = &spi1;
++ };
++
++ chosen {
++ u-boot,spl-boot-order = "same-as-spl", &sdhci, &sdmmc;
++ };
++
++ config {
++ u-boot,spl-payload-offset = <0x60000>; /* @ 384KB */
++ };
++};
++
++&i2c0 {
++ u-boot,dm-pre-reloc;
++};
++
++&rk818 {
++ u-boot,dm-pre-reloc;
++};
++
++&rng {
++ status = "okay";
++};
++
++&sdhci {
++ max-frequency = <25000000>;
++ u-boot,dm-pre-reloc;
++};
++
++&sdmmc {
++ max-frequency = <20000000>;
++ u-boot,dm-pre-reloc;
++};
+diff --git a/arch/arm/dts/rk3399-pinephone-pro.dts b/arch/arm/dts/rk3399-pinephone-pro.dts
+new file mode 100644
+index 0000000000..3fe1845ced
+--- /dev/null
++++ b/arch/arm/dts/rk3399-pinephone-pro.dts
+@@ -0,0 +1,520 @@
++// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
++/*
++ * Copyright (c) 2021 Martijn Braam <martijn brixit nl>
++ */
++
++/dts-v1/;
++#include "rk3399.dtsi"
++#include "rk3399-opp.dtsi"
++
++/ {
++ model = "Pine64 PinePhone Pro";
++ compatible = "pine64,pinephone-pro", "rockchip,rk3399";
++
++ chosen {
++ stdout-path = "serial2:1500000n8";
++ };
++
++ sdio_pwrseq: sdio-pwrseq {
++ compatible = "mmc-pwrseq-simple";
++ pinctrl-names = "default";
++ };
++
++ /* Power tree */
++ /* Root power source */
++ vcc_sysin: vcc-sysin {
++ compatible = "regulator-fixed";
++ regulator-name = "vcc_sysin";
++ regulator-always-on;
++ regulator-boot-on;
++ };
++
++ /* Main 3.3v supply */
++ vcc3v3_sys: vcc3v3-sys {
++ compatible = "regulator-fixed";
++ regulator-name = "vcc3v3_sys";
++ regulator-always-on;
++ regulator-boot-on;
++ regulator-min-microvolt = <3300000>;
++ regulator-max-microvolt = <3300000>;
++ vin-supply = <&vcc_sysin>;
++
++ regulator-state-mem {
++ regulator-on-in-suspend;
++ };
++ };
++};
++
++&cpu_l0 {
++ cpu-supply = <&vdd_cpu_l>;
++};
++
++&cpu_l1 {
++ cpu-supply = <&vdd_cpu_l>;
++};
++
++&cpu_l2 {
++ cpu-supply = <&vdd_cpu_l>;
++};
++
++&cpu_l3 {
++ cpu-supply = <&vdd_cpu_l>;
++};
++
++&cpu_b0 {
++ cpu-supply = <&vdd_cpu_b>;
++};
++
++&cpu_b1 {
++ cpu-supply = <&vdd_cpu_b>;
++};
++
++&emmc_phy {
++ status = "okay";
++};
++
++&gpu {
++ mali-supply = <&vdd_gpu>;
++ status = "okay";
++};
++
++&i2c0 {
++ clock-frequency = <400000>;
++ i2c-scl-rising-time-ns = <168>;
++ i2c-scl-falling-time-ns = <4>;
++ status = "okay";
++
++ rk818: pmic@1c {
++ compatible = "rockchip,rk818";
++ reg = <0x1c>;
++ interrupt-parent = <&gpio1>;
++ interrupts = <RK_PC5 IRQ_TYPE_LEVEL_LOW>;
++ #clock-cells = <1>;
++ clock-output-names = "xin32k", "rk808-clkout2";
++ pinctrl-names = "default";
++ pinctrl-0 = <&pmic_int_l>;
++ rockchip,system-power-controller;
++ wakeup-source;
++
++ vcc1-supply = <&vcc_sysin>;
++ vcc2-supply = <&vcc_sysin>;
++ vcc3-supply = <&vcc_sysin>;
++ vcc4-supply = <&vcc_sysin>;
++ vcc6-supply = <&vcc_sysin>;
++ vcc7-supply = <&vcc3v3_sys>;
++ vcc8-supply = <&vcc_sysin>;
++ vcc9-supply = <&vcc3v3_sys>;
++
++ regulators {
++ vdd_cpu_l: DCDC_REG1 {
++ regulator-name = "vdd_cpu_1";
++ regulator-always-on;
++ regulator-boot-on;
++ regulator-min-microvolt = <750000>;
++ regulator-max-microvolt = <1350000>;
++ regulator-ramp-delay = <6001>;
++ regulator-state-mem {
++ regulator-off-in-suspend;
++ };
++ };
++
++ vdd_center: DCDC_REG2 {
++ regulator-name = "vdd_center";
++ regulator-always-on;
++ regulator-boot-on;
++ regulator-min-microvolt = <800000>;
++ regulator-max-microvolt = <1350000>;
++ regulator-ramp-delay = <6001>;
++ regulator-state-mem {
++ regulator-off-in-suspend;
++ };
++ };
++
++ vcc_ddr: DCDC_REG3 {
++ regulator-name = "vcc_ddr";
++ regulator-always-on;
++ regulator-boot-on;
++ regulator-state-mem {
++ regulator-on-in-suspend;
++ };
++ };
++
++ vcc_1v8: DCDC_REG4 {
++ regulator-name = "vcc_1v8";
++ regulator-always-on;
++ regulator-boot-on;
++ regulator-min-microvolt = <1800000>;
++ regulator-max-microvolt = <1800000>;
++ regulator-state-mem {
++ regulator-on-in-suspend;
++ regulator-suspend-microvolt = <1800000>;
++ };
++ };
++
++ vcca3v0_codec: LDO_REG1 {
++ regulator-name = "vcca3v0_codec";
++ regulator-always-on;
++ regulator-boot-on;
++ regulator-min-microvolt = <3000000>;
++ regulator-max-microvolt = <3000000>;
++ regulator-state-mem {
++ regulator-off-in-suspend;
++ };
++ };
++
++ vcc3v0_touch: LDO_REG2 {
++ regulator-name = "vcc3v0_touch";
++ regulator-always-on;
++ regulator-boot-on;
++ regulator-min-microvolt = <3000000>;
++ regulator-max-microvolt = <3000000>;
++ regulator-state-mem {
++ regulator-off-in-suspend;
++ };
++ };
++
++ vcca1v8_codec: LDO_REG3 {
++ regulator-name = "vcca1v8_codec";
++ regulator-always-on;
++ regulator-boot-on;
++ regulator-min-microvolt = <1800000>;
++ regulator-max-microvolt = <1800000>;
++ regulator-state-mem {
++ regulator-off-in-suspend;
++ };
++ };
++
++ vcc_power_on: LDO_REG4 {
++ regulator-name = "vcc_power_on";
++ regulator-always-on;
++ regulator-boot-on;
++ regulator-min-microvolt = <3300000>;
++ regulator-max-microvolt = <3300000>;
++ regulator-state-mem {
++ regulator-on-in-suspend;
++ regulator-suspend-microvolt = <3300000>;
++ };
++ };
++
++ vcc_3v0: LDO_REG5 {
++ regulator-name = "vcc_3v0";
++ regulator-always-on;
++ regulator-boot-on;
++ regulator-min-microvolt = <3000000>;
++ regulator-max-microvolt = <3000000>;
++ regulator-state-mem {
++ regulator-on-in-suspend;
++ regulator-suspend-microvolt = <3000000>;
++ };
++ };
++
++ vcc_1v5: LDO_REG6 {
++ regulator-name = "vcc_1v5";
++ regulator-always-on;
++ regulator-boot-on;
++ regulator-min-microvolt = <1500000>;
++ regulator-max-microvolt = <1500000>;
++ regulator-state-mem {
++ regulator-on-in-suspend;
++ regulator-suspend-microvolt = <1500000>;
++ };
++ };
++
++ vcc1v8_dvp: LDO_REG7 {
++ regulator-name = "vcc1v8_dvp";
++ regulator-always-on;
++ regulator-boot-on;
++ regulator-min-microvolt = <1800000>;
++ regulator-max-microvolt = <1800000>;
++ regulator-state-mem {
++ regulator-off-in-suspend;
++ };
++ };
++
++ vcc3v3_s3: LDO_REG8 {
++ regulator-name = "vcc3v3_s3";
++ regulator-always-on;
++ regulator-boot-on;
++ regulator-min-microvolt = <3300000>;
++ regulator-max-microvolt = <3300000>;
++ regulator-state-mem {
++ regulator-off-in-suspend;
++ };
++ };
++
++ vcc_sd: LDO_REG9 {
++ regulator-name = "vcc_sd";
++ regulator-min-microvolt = <1800000>;
++ regulator-max-microvolt = <3300000>;
++ regulator-state-mem {
++ regulator-on-in-suspend;
++ regulator-suspend-microvolt = <3300000>;
++ };
++ };
++
++ vcc3v3_s0: SWITCH_REG {
++ regulator-name = "vcc3v3_s0";
++ regulator-always-on;
++ regulator-boot-on;
++ regulator-state-mem {
++ regulator-on-in-suspend;
++ };
++ };
++
++ boost_otg: DCDC_BOOST {
++ regulator-name = "boost_otg";
++ regulator-always-on;
++ regulator-boot-on;
++ regulator-min-microvolt = <5000000>;
++ regulator-max-microvolt = <5000000>;
++ regulator-state-mem {
++ regulator-on-in-suspend;
++ regulator-suspend-microvolt = <5000000>;
++ };
++ };
++
++ otg_switch: OTG_SWITCH {
++ regulator-name = "otg_switch";
++ };
++ };
++ };
++
++ vdd_cpu_b: regulator@40 {
++ compatible = "silergy,syr827";
++ reg = <0x40>;
++ fcs,suspend-voltage-selector = <1>;
++ pinctrl-names = "default";
++ pinctrl-0 = <&vsel1_pin>;
++ regulator-name = "vdd_cpu_b";
++ regulator-min-microvolt = <712500>;
++ regulator-max-microvolt = <1500000>;
++ regulator-ramp-delay = <1000>;
++ regulator-always-on;
++ regulator-boot-on;
++
++ regulator-state-mem {
++ regulator-off-in-suspend;
++ };
++ };
++
++ vdd_gpu: regulator@41 {
++ compatible = "silergy,syr828";
++ reg = <0x41>;
++ fcs,suspend-voltage-selector = <1>;
++ pinctrl-names = "default";
++ pinctrl-0 = <&vsel2_pin>;
++ regulator-name = "vdd_gpu";
++ regulator-min-microvolt = <712500>;
++ regulator-max-microvolt = <1500000>;
++ regulator-ramp-delay = <1000>;
++ regulator-always-on;
++ regulator-boot-on;
++
++ regulator-state-mem {
++ regulator-off-in-suspend;
++ };
++ };
++};
++
++&i2c1 {
++ i2c-scl-rising-time-ns = <300>;
++ i2c-scl-falling-time-ns = <15>;
++ status = "okay";
++};
++
++&i2c3 {
++ i2c-scl-rising-time-ns = <450>;
++ i2c-scl-falling-time-ns = <15>;
++ status = "okay";
++};
++
++&i2c4 {
++ i2c-scl-rising-time-ns = <600>;
++ i2c-scl-falling-time-ns = <20>;
++ status = "okay";
++
++ fusb0: typec-portc@22 {
++ compatible = "fcs,fusb302";
++ reg = <0x22>;
++ interrupt-parent = <&gpio1>;
++ interrupts = <RK_PA2 IRQ_TYPE_LEVEL_LOW>;
++ pinctrl-names = "default";
++ pinctrl-0 = <&fusb0_int>;
++ status = "okay";
++ };
++};
++
++&io_domains {
++ status = "okay";
++
++ bt656-supply = <&vcc1v8_dvp>;
++ audio-supply = <&vcca1v8_codec>;
++ sdmmc-supply = <&vcc_sd>;
++ gpio1830-supply = <&vcc_3v0>;
++};
++
++&pmu_io_domains {
++ pmu1830-supply = <&vcc_3v0>;
++ status = "okay";
++};
++
++&pinctrl {
++ bt {
++ bt_enable_h: bt-enable-h {
++ rockchip,pins = <0 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>;
++ };
++
++ bt_host_wake_l: bt-host-wake-l {
++ rockchip,pins = <0 RK_PA4 RK_FUNC_GPIO &pcfg_pull_down>;
++ };
++
++ bt_wake_l: bt-wake-l {
++ rockchip,pins = <2 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>;
++ };
++ };
++
++ buttons {
++ pwrbtn: pwrbtn {
++ rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>;
++ };
++ };
++
++ fusb302x {
++ fusb0_int: fusb0-int {
++ rockchip,pins = <1 RK_PA2 RK_FUNC_GPIO &pcfg_pull_up>;
++ };
++ };
++
++ leds {
++ work_led_pin: work-led-pin {
++ rockchip,pins = <0 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>;
++ };
++
++ diy_led_pin: diy-led-pin {
++ rockchip,pins = <0 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>;
++ };
++ };
++
++ pcie {
++ pcie_perst: pcie-perst {
++ rockchip,pins = <2 RK_PD4 RK_FUNC_GPIO &pcfg_pull_none>;
++ };
++
++ pcie_pwr_en: pcie-pwr-en {
++ rockchip,pins = <1 RK_PD0 RK_FUNC_GPIO &pcfg_pull_none>;
++ };
++ };
++
++ pmic {
++ pmic_int_l: pmic-int-l {
++ rockchip,pins = <1 RK_PC5 RK_FUNC_GPIO &pcfg_pull_up>;
++ };
++
++ vsel1_pin: vsel1-pin {
++ rockchip,pins = <1 RK_PC1 RK_FUNC_GPIO &pcfg_pull_down>;
++ };
++
++ vsel2_pin: vsel2-pin {
++ rockchip,pins = <1 RK_PB6 RK_FUNC_GPIO &pcfg_pull_down>;
++ };
++ };
++
++ sdcard {
++ sdmmc0_pwr_h: sdmmc0-pwr-h {
++ rockchip,pins = <0 RK_PA1 RK_FUNC_GPIO &pcfg_pull_none>;
++ };
++
++ };
++
++ sdio-pwrseq {
++ wifi_enable_h: wifi-enable-h {
++ rockchip,pins = <0 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>;
++ };
++ };
++
++ usb-typec {
++ vcc5v0_typec_en: vcc5v0_typec_en {
++ rockchip,pins = <1 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>;
++ };
++ };
++
++ usb2 {
++ vcc5v0_host_en: vcc5v0-host-en {
++ rockchip,pins = <4 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>;
++ };
++ };
++};
++
++&pwm0 {
++ status = "okay";
++};
++
++&pwm1 {
++ status = "okay";
++};
++
++&pwm2 {
++ status = "okay";
++};
++
++&sdio0 {
++ bus-width = <4>;
++ cap-sd-highspeed;
++ cap-sdio-irq;
++ disable-wp;
++ keep-power-in-suspend;
++ mmc-pwrseq = <&sdio_pwrseq>;
++ non-removable;
++ pinctrl-names = "default";
++ pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>;
++ sd-uhs-sdr104;
++ status = "okay";
++};
++
++&sdmmc {
++ bus-width = <4>;
++ cap-sd-highspeed;
++ cd-gpios = <&gpio0 7 GPIO_ACTIVE_LOW>;
++ disable-wp;
++ max-frequency = <150000000>;
++ pinctrl-names = "default";
++ pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_bus4>;
++ vmmc-supply = <&vcc3v3_s3>;
++ vqmmc-supply = <&vcc_1v8>;
++ status = "okay";
++};
++
++&sdhci {
++ bus-width = <8>;
++ mmc-hs200-1_8v;
++ non-removable;
++ status = "okay";
++};
++
++&tsadc {
++ /* tshut mode 0:CRU 1:GPIO */
++ rockchip,hw-tshut-mode = <1>;
++ /* tshut polarity 0:LOW 1:HIGH */
++ rockchip,hw-tshut-polarity = <1>;
++ status = "okay";
++};
++
++&uart2 {
++ status = "okay";
++};
++
++&vopb {
++ status = "okay";
++};
++
++&vopb_mmu {
++ status = "okay";
++};
++
++&vopl {
++ status = "okay";
++};
++
++&vopl_mmu {
++ status = "okay";
++};
+diff --git a/arch/arm/mach-rockchip/rk3399/Kconfig b/arch/arm/mach-rockchip/rk3399/Kconfig
+index 17628f9171..3ba603ca80 100644
+--- a/arch/arm/mach-rockchip/rk3399/Kconfig
++++ b/arch/arm/mach-rockchip/rk3399/Kconfig
+@@ -28,6 +28,13 @@ config TARGET_PINEBOOK_PRO_RK3399
+ with 4Gb RAM, onboard eMMC, USB-C, a USB3 and USB2 port,
+ 1920*1080 screen and all the usual laptop features.
+
++config TARGET_PINEPHONE_PRO_RK3399
++ bool "PinePhone Pro"
++ help
++ PinePhone Pro is a phone based on the Rockchip rk3399 SoC
++ with 4Gb RAM, onboard eMMC, USB-C, a headphone jack,
++ 720x1440 screen and an external Quectel USB modem.
++
+ config TARGET_PUMA_RK3399
+ bool "Theobroma Systems RK3399-Q7 (Puma)"
+ help
+@@ -154,6 +161,7 @@ endif # BOOTCOUNT_LIMIT
+ source "board/firefly/roc-pc-rk3399/Kconfig"
+ source "board/google/gru/Kconfig"
+ source "board/pine64/pinebook-pro-rk3399/Kconfig"
++source "board/pine64/pinephone-pro-rk3399/Kconfig"
+ source "board/pine64/rockpro64_rk3399/Kconfig"
+ source "board/rockchip/evb_rk3399/Kconfig"
+ source "board/theobroma-systems/puma_rk3399/Kconfig"
+diff --git a/board/pine64/pinephone-pro-rk3399/Kconfig b/board/pine64/pinephone-pro-rk3399/Kconfig
+new file mode 100644
+index 0000000000..13d6465ae6
+--- /dev/null
++++ b/board/pine64/pinephone-pro-rk3399/Kconfig
+@@ -0,0 +1,15 @@
++if TARGET_PINEPHONE_PRO_RK3399
++
++config SYS_BOARD
++ default "pinephone-pro-rk3399"
++
++config SYS_VENDOR
++ default "pine64"
++
++config SYS_CONFIG_NAME
++ default "pinephone-pro-rk3399"
++
++config BOARD_SPECIFIC_OPTIONS
++ def_bool y
++
++endif
+diff --git a/board/pine64/pinephone-pro-rk3399/MAINTAINERS b/board/pine64/pinephone-pro-rk3399/MAINTAINERS
+new file mode 100644
+index 0000000000..9ca4fc4cbe
+--- /dev/null
++++ b/board/pine64/pinephone-pro-rk3399/MAINTAINERS
+@@ -0,0 +1,8 @@
++PINEPHONE_PRO
++M: Martijn Braam <martijn brixit nl>
++S: Maintained
++F: board/pine64/rk3399-pinephone-pro/
++F: include/configs/rk3399-pinephone-pro.h
++F: arch/arm/dts/rk3399-pinephone-pro.dts
++F: arch/arm/dts/rk3399-pinephone-pro-u-boot.dtsi
++F: configs/pinephone-pro-rk3399_defconfig
+diff --git a/board/pine64/pinephone-pro-rk3399/Makefile b/board/pine64/pinephone-pro-rk3399/Makefile
+new file mode 100644
+index 0000000000..8d9203053e
+--- /dev/null
++++ b/board/pine64/pinephone-pro-rk3399/Makefile
+@@ -0,0 +1 @@
++obj-y += pinephone-pro-rk3399.o
+diff --git a/board/pine64/pinephone-pro-rk3399/pinephone-pro-rk3399.c
b/board/pine64/pinephone-pro-rk3399/pinephone-pro-rk3399.c
+new file mode 100644
+index 0000000000..8efeb6ea3d
+--- /dev/null
++++ b/board/pine64/pinephone-pro-rk3399/pinephone-pro-rk3399.c
+@@ -0,0 +1,57 @@
++// SPDX-License-Identifier: GPL-2.0+
++/*
++ * (C) Copyright 2019 Vasily Khoruzhick <anarsoul gmail com>
++ * (C) Copyright 2021 Martijn Braam <martijn brixit nl>
++ */
++
++#include <common.h>
++#include <dm.h>
++#include <init.h>
++#include <syscon.h>
++#include <asm/io.h>
++#include <asm/arch-rockchip/clock.h>
++#include <asm/arch-rockchip/grf_rk3399.h>
++#include <asm/arch-rockchip/hardware.h>
++#include <asm/arch-rockchip/misc.h>
++
++#define GRF_IO_VSEL_BT565_SHIFT 0
++#define PMUGRF_CON0_VSEL_SHIFT 8
++
++#ifdef CONFIG_MISC_INIT_R
++static void setup_iodomain(void)
++{
++ struct rk3399_grf_regs *grf =
++ syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
++ struct rk3399_pmugrf_regs *pmugrf =
++ syscon_get_first_range(ROCKCHIP_SYSCON_PMUGRF);
++
++ /* BT565 is in 1.8v domain */
++ rk_setreg(&grf->io_vsel, 1 << GRF_IO_VSEL_BT565_SHIFT);
++
++ /* Set GPIO1 1.8v/3.0v source select to PMU1830_VOL */
++ rk_setreg(&pmugrf->soc_con0, 1 << PMUGRF_CON0_VSEL_SHIFT);
++}
++
++int misc_init_r(void)
++{
++ const u32 cpuid_offset = 0x7;
++ const u32 cpuid_length = 0x10;
++ u8 cpuid[cpuid_length];
++ int ret;
++
++ setup_iodomain();
++
++ ret = rockchip_cpuid_from_efuse(cpuid_offset, cpuid_length, cpuid);
++ if (ret)
++ return ret;
++
++ ret = rockchip_cpuid_set(cpuid, cpuid_length);
++ if (ret)
++ return ret;
++
++ ret = rockchip_setup_macaddr();
++
++ return ret;
++}
++
++#endif
+diff --git a/configs/pinephone-pro-rk3399_defconfig b/configs/pinephone-pro-rk3399_defconfig
+new file mode 100644
+index 0000000000..2cf80f7d35
+--- /dev/null
++++ b/configs/pinephone-pro-rk3399_defconfig
+@@ -0,0 +1,92 @@
++CONFIG_ARM=y
++CONFIG_SKIP_LOWLEVEL_INIT=y
++CONFIG_ARCH_ROCKCHIP=y
++CONFIG_SYS_TEXT_BASE=0x00200000
++CONFIG_NR_DRAM_BANKS=1
++CONFIG_ENV_SIZE=0x8000
++CONFIG_ROCKCHIP_RK3399=y
++CONFIG_TARGET_PINEPHONE_PRO_RK3399=y
++CONFIG_DEBUG_UART_BASE=0xFF1A0000
++CONFIG_DEBUG_UART_CLOCK=24000000
++CONFIG_SPL_SPI_FLASH_SUPPORT=y
++CONFIG_SPL_SPI_SUPPORT=y
++CONFIG_DEFAULT_DEVICE_TREE="rk3399-pinephone-pro"
++CONFIG_DEBUG_UART=y
++CONFIG_SYS_LOAD_ADDR=0x800800
++CONFIG_BOOTDELAY=3
++CONFIG_USE_PREBOOT=y
++CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-pinephone-pro.dtb"
++CONFIG_DISPLAY_BOARDINFO_LATE=y
++CONFIG_MISC_INIT_R=y
++# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
++CONFIG_SPL_STACK_R=y
++CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000
++CONFIG_SPL_MTD_SUPPORT=y
++CONFIG_SPL_SPI_LOAD=y
++CONFIG_TPL=y
++CONFIG_CMD_BOOTZ=y
++CONFIG_CMD_GPIO=y
++CONFIG_CMD_GPT=y
++CONFIG_CMD_I2C=y
++CONFIG_CMD_MMC=y
++CONFIG_CMD_PCI=y
++CONFIG_CMD_USB=y
++# CONFIG_CMD_SETEXPR is not set
++CONFIG_CMD_TIME=y
++CONFIG_CMD_PMIC=y
++CONFIG_CMD_REGULATOR=y
++CONFIG_SPL_OF_CONTROL=y
++CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks
assigned-clock-rates assigned-clock-parents"
++CONFIG_ENV_IS_IN_SPI_FLASH=y
++CONFIG_SYS_RELOC_GD_ENV_ADDR=y
++CONFIG_ROCKCHIP_GPIO=y
++CONFIG_SYS_I2C_ROCKCHIP=y
++CONFIG_DM_KEYBOARD=y
++CONFIG_LED=y
++CONFIG_LED_GPIO=y
++CONFIG_MISC=y
++CONFIG_ROCKCHIP_EFUSE=y
++CONFIG_MMC_DW=y
++CONFIG_MMC_DW_ROCKCHIP=y
++CONFIG_MMC_SDHCI=y
++CONFIG_MMC_SDHCI_SDMA=y
++CONFIG_MMC_SDHCI_ROCKCHIP=y
++CONFIG_SF_DEFAULT_SPEED=20000000
++CONFIG_SPI_FLASH_GIGADEVICE=y
++CONFIG_SPI_FLASH_WINBOND=y
++CONFIG_DM_ETH=y
++CONFIG_PHY_ROCKCHIP_INNO_USB2=y
++CONFIG_PHY_ROCKCHIP_TYPEC=y
++CONFIG_DM_PMIC_FAN53555=y
++CONFIG_PMIC_RK8XX=y
++CONFIG_REGULATOR_PWM=y
++CONFIG_REGULATOR_RK8XX=y
++CONFIG_PWM_ROCKCHIP=y
++CONFIG_RAM_RK3399_LPDDR4=y
++CONFIG_DM_RESET=y
++CONFIG_DM_RNG=y
++CONFIG_RNG_ROCKCHIP=y
++CONFIG_BAUDRATE=1500000
++CONFIG_DEBUG_UART_SHIFT=2
++CONFIG_ROCKCHIP_SPI=y
++CONFIG_SYSRESET=y
++CONFIG_USB=y
++CONFIG_USB_XHCI_HCD=y
++CONFIG_USB_XHCI_DWC3=y
++CONFIG_USB_EHCI_HCD=y
++CONFIG_USB_EHCI_GENERIC=y
++CONFIG_USB_OHCI_HCD=y
++CONFIG_USB_OHCI_GENERIC=y
++CONFIG_USB_DWC3=y
++CONFIG_USB_DWC3_GENERIC=y
++CONFIG_USB_KEYBOARD=y
++CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y
++CONFIG_USB_HOST_ETHER=y
++CONFIG_USB_ETHER_ASIX=y
++CONFIG_USB_ETHER_RTL8152=y
++CONFIG_DM_VIDEO=y
++CONFIG_DISPLAY=y
++CONFIG_VIDEO_ROCKCHIP=y
++CONFIG_DISPLAY_ROCKCHIP_EDP=y
++CONFIG_SPL_TINY_MEMSET=y
++CONFIG_ERRNO_STR=y
+diff --git a/include/configs/pinephone-pro-rk3399.h b/include/configs/pinephone-pro-rk3399.h
+new file mode 100644
+index 0000000000..fefa793fdd
+--- /dev/null
++++ b/include/configs/pinephone-pro-rk3399.h
+@@ -0,0 +1,23 @@
++/* SPDX-License-Identifier: GPL-2.0+ */
++/*
++ * Copyright (C) 2016 Rockchip Electronics Co., Ltd
++ * Copyright (C) 2020 Peter Robinson <pbrobinson at gmail.com>
++ * Copyright (C) 2021 Martijn Braam <martijn brixit nl>
++ */
++
++#ifndef __PINEPHONE_PRO_RK3399_H
++#define __PINEPHONE_PRO_RK3399_H
++
++#define ROCKCHIP_DEVICE_SETTINGS \
++ "stdin=serial,usbkbd\0" \
++ "stdout=serial,vidconsole\0" \
++ "stderr=serial,vidconsole\0"
++
++#include <configs/rk3399_common.h>
++
++#define SDRAM_BANK_SIZE (2UL << 30)
++
++#define CONFIG_USB_OHCI_NEW
++#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2
++
++#endif
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