[evince/wip/hadess/lzma-sdk-2104: 1/2] unarr: Update LZMA SDK

[Bastien Nocera <hadess src gnome org>]

commit a9f6bb74557d0bec98ca75f73134995bd8e6ceb0
Author: Bastien Nocera <hadess hadess net>
Date:   Fri Nov 19 19:50:03 2021 +0100

    unarr: Update LZMA SDK
    
    Using lzma2103.7z from:
    https://sourceforge.net/projects/sevenzip/files/LZMA%20SDK/

 cut-n-paste/unarr/lzmasdk/7zTypes.h |  7 ++++-
 cut-n-paste/unarr/lzmasdk/CpuArch.c | 62 ++++++++++++++++++++++++++++++-------
 cut-n-paste/unarr/lzmasdk/CpuArch.h | 29 +++++++++++++----
 3 files changed, 80 insertions(+), 18 deletions(-)
---
diff --git a/cut-n-paste/unarr/lzmasdk/7zTypes.h b/cut-n-paste/unarr/lzmasdk/7zTypes.h
index f817b7f58..3f66a7b51 100644
--- a/cut-n-paste/unarr/lzmasdk/7zTypes.h
+++ b/cut-n-paste/unarr/lzmasdk/7zTypes.h
@@ -1,5 +1,5 @@
 /* 7zTypes.h -- Basic types
-2021-04-25 : Igor Pavlov : Public domain */
+2021-07-13 : Igor Pavlov : Public domain */
 
 #ifndef __7Z_TYPES_H
 #define __7Z_TYPES_H
@@ -62,6 +62,8 @@ typedef int SRes;
 typedef unsigned WRes;
 #define MY_SRes_HRESULT_FROM_WRes(x) HRESULT_FROM_WIN32(x)
 
+// #define MY_HRES_ERROR__INTERNAL_ERROR  MY_SRes_HRESULT_FROM_WRes(ERROR_INTERNAL_ERROR)
+
 #else // _WIN32
 
 // #define ENV_HAVE_LSTAT
@@ -95,6 +97,7 @@ typedef int WRes;
 #define ERROR_DIRECTORY                  267L
 #define ERROR_TOO_MANY_POSTS             298L
 
+#define ERROR_INTERNAL_ERROR             1359L
 #define ERROR_INVALID_REPARSE_DATA       4392L
 #define ERROR_REPARSE_TAG_INVALID        4393L
 #define ERROR_REPARSE_TAG_MISMATCH       4394L
@@ -206,6 +209,8 @@ typedef size_t SIZE_T;
 #endif //  _WIN32
 
 
+#define MY_HRES_ERROR__INTERNAL_ERROR  ((HRESULT)0x8007054FL)
+
 
 #ifdef _SZ_NO_INT_64
 
diff --git a/cut-n-paste/unarr/lzmasdk/CpuArch.c b/cut-n-paste/unarr/lzmasdk/CpuArch.c
index 99774346c..551a8d72a 100644
--- a/cut-n-paste/unarr/lzmasdk/CpuArch.c
+++ b/cut-n-paste/unarr/lzmasdk/CpuArch.c
@@ -1,5 +1,5 @@
 /* CpuArch.c -- CPU specific code
-2021-04-28 : Igor Pavlov : Public domain */
+2021-07-13 : Igor Pavlov : Public domain */
 
 #include "Precomp.h"
 
@@ -278,6 +278,30 @@ BoolInt CPU_IsSupported_SHA(void)
 #include <Windows.h>
 #endif
 
+BoolInt CPU_IsSupported_AVX2(void)
+{
+  Cx86cpuid p;
+  CHECK_SYS_SSE_SUPPORT
+
+  #ifdef _WIN32
+  #define MY__PF_XSAVE_ENABLED  17
+  if (!IsProcessorFeaturePresent(MY__PF_XSAVE_ENABLED))
+    return False;
+  #endif
+
+  if (!x86cpuid_CheckAndRead(&p))
+    return False;
+  if (p.maxFunc < 7)
+    return False;
+  {
+    UInt32 d[4] = { 0 };
+    MyCPUID(7, &d[0], &d[1], &d[2], &d[3]);
+    // printf("\ncpuid(7): ebx=%8x ecx=%8x\n", d[1], d[2]);
+    return 1
+      & (d[1] >> 5); // avx2
+  }
+}
+
 BoolInt CPU_IsSupported_VAES_AVX2(void)
 {
   Cx86cpuid p;
@@ -329,10 +353,9 @@ BoolInt CPU_IsSupported_PageGB(void)
 
 #include <Windows.h>
 
-BoolInt CPU_IsSupported_CRC32(void)
-  { return IsProcessorFeaturePresent(PF_ARM_V8_CRC32_INSTRUCTIONS_AVAILABLE) ? 1 : 0; }
-BoolInt CPU_IsSupported_CRYPTO(void)
-  { return IsProcessorFeaturePresent(PF_ARM_V8_CRYPTO_INSTRUCTIONS_AVAILABLE) ? 1 : 0; }
+BoolInt CPU_IsSupported_CRC32(void)  { return 
IsProcessorFeaturePresent(PF_ARM_V8_CRC32_INSTRUCTIONS_AVAILABLE) ? 1 : 0; }
+BoolInt CPU_IsSupported_CRYPTO(void) { return 
IsProcessorFeaturePresent(PF_ARM_V8_CRYPTO_INSTRUCTIONS_AVAILABLE) ? 1 : 0; }
+BoolInt CPU_IsSupported_NEON(void)   { return IsProcessorFeaturePresent(PF_ARM_NEON_INSTRUCTIONS_AVAILABLE) 
? 1 : 0; }
 
 #else
 
@@ -356,17 +379,27 @@ static void Print_sysctlbyname(const char *name)
 }
 */
 
-BoolInt CPU_IsSupported_CRC32(void)
+static BoolInt My_sysctlbyname_Get_BoolInt(const char *name)
 {
+  UInt32 val = 0;
+  if (My_sysctlbyname_Get_UInt32(name, &val) == 0 && val == 1)
+    return 1;
+  return 0;
+}
+
   /*
   Print_sysctlbyname("hw.pagesize");
   Print_sysctlbyname("machdep.cpu.brand_string");
   */
 
-  UInt32 val = 0;
-  if (My_sysctlbyname_Get_UInt32("hw.optional.armv8_crc32", &val) == 0 && val == 1)
-    return 1;
-  return 0;
+BoolInt CPU_IsSupported_CRC32(void)
+{
+  return My_sysctlbyname_Get_BoolInt("hw.optional.armv8_crc32");
+}
+
+BoolInt CPU_IsSupported_NEON(void)
+{
+  return My_sysctlbyname_Get_BoolInt("hw.optional.neon");
 }
 
 #ifdef MY_CPU_ARM64
@@ -390,18 +423,25 @@ BoolInt CPU_IsSupported_AES (void) { return APPLE_CRYPTO_SUPPORT_VAL; }
 
 #include <asm/hwcap.h>
 
+  #define MY_HWCAP_CHECK_FUNC_2(name1, name2) \
+  BoolInt CPU_IsSupported_ ## name1() { return (getauxval(AT_HWCAP)  & (HWCAP_  ## name2)) ? 1 : 0; }
+
 #ifdef MY_CPU_ARM64
   #define MY_HWCAP_CHECK_FUNC(name) \
-  BoolInt CPU_IsSupported_ ## name() { return (getauxval(AT_HWCAP)  & (HWCAP_  ## name)) ? 1 : 0; }
+  MY_HWCAP_CHECK_FUNC_2(name, name)
+  MY_HWCAP_CHECK_FUNC_2(NEON, ASIMD)
+// MY_HWCAP_CHECK_FUNC (ASIMD)
 #elif defined(MY_CPU_ARM)
   #define MY_HWCAP_CHECK_FUNC(name) \
   BoolInt CPU_IsSupported_ ## name() { return (getauxval(AT_HWCAP2) & (HWCAP2_ ## name)) ? 1 : 0; }
+  MY_HWCAP_CHECK_FUNC_2(NEON, NEON)
 #endif
 
 #else // USE_HWCAP
 
   #define MY_HWCAP_CHECK_FUNC(name) \
   BoolInt CPU_IsSupported_ ## name() { return 0; }
+  MY_HWCAP_CHECK_FUNC(NEON)
 
 #endif // USE_HWCAP
 
diff --git a/cut-n-paste/unarr/lzmasdk/CpuArch.h b/cut-n-paste/unarr/lzmasdk/CpuArch.h
index 6c4ab404b..529d3a502 100644
--- a/cut-n-paste/unarr/lzmasdk/CpuArch.h
+++ b/cut-n-paste/unarr/lzmasdk/CpuArch.h
@@ -1,5 +1,5 @@
 /* CpuArch.h -- CPU specific code
-2021-04-25 : Igor Pavlov : Public domain */
+2021-07-13 : Igor Pavlov : Public domain */
 
 #ifndef __CPU_ARCH_H
 #define __CPU_ARCH_H
@@ -225,7 +225,6 @@ MY_CPU_64BIT means that processor can work with 64-bit registers.
   #endif
 #else
   #ifdef __xlC__
-    // for XLC compiler:
     #define MY_CPU_pragma_pack_push_1   _Pragma("pack(1)")
     #define MY_CPU_pragma_pop           _Pragma("pack()")
   #else
@@ -253,8 +252,12 @@ MY_CPU_64BIT means that processor can work with 64-bit registers.
 
 #ifdef MY_CPU_LE
   #if defined(MY_CPU_X86_OR_AMD64) \
-      || defined(MY_CPU_ARM64) \
-      || defined(__ARM_FEATURE_UNALIGNED)
+      || defined(MY_CPU_ARM64)
+    #define MY_CPU_LE_UNALIGN
+    #define MY_CPU_LE_UNALIGN_64
+  #elif defined(__ARM_FEATURE_UNALIGNED)
+    /* gcc9 for 32-bit arm can use LDRD instruction that requires 32-bit alignment.
+       So we can't use unaligned 64-bit operations. */
     #define MY_CPU_LE_UNALIGN
   #endif
 #endif
@@ -264,11 +267,15 @@ MY_CPU_64BIT means that processor can work with 64-bit registers.
 
 #define GetUi16(p) (*(const UInt16 *)(const void *)(p))
 #define GetUi32(p) (*(const UInt32 *)(const void *)(p))
+#ifdef MY_CPU_LE_UNALIGN_64
 #define GetUi64(p) (*(const UInt64 *)(const void *)(p))
+#endif
 
 #define SetUi16(p, v) { *(UInt16 *)(void *)(p) = (v); }
 #define SetUi32(p, v) { *(UInt32 *)(void *)(p) = (v); }
+#ifdef MY_CPU_LE_UNALIGN_64
 #define SetUi64(p, v) { *(UInt64 *)(void *)(p) = (v); }
+#endif
 
 #else
 
@@ -282,8 +289,6 @@ MY_CPU_64BIT means that processor can work with 64-bit registers.
     ((UInt32)((const Byte *)(p))[2] << 16) | \
     ((UInt32)((const Byte *)(p))[3] << 24))
 
-#define GetUi64(p) (GetUi32(p) | ((UInt64)GetUi32(((const Byte *)(p)) + 4) << 32))
-
 #define SetUi16(p, v) { Byte *_ppp_ = (Byte *)(p); UInt32 _vvv_ = (v); \
     _ppp_[0] = (Byte)_vvv_; \
     _ppp_[1] = (Byte)(_vvv_ >> 8); }
@@ -294,12 +299,22 @@ MY_CPU_64BIT means that processor can work with 64-bit registers.
     _ppp_[2] = (Byte)(_vvv_ >> 16); \
     _ppp_[3] = (Byte)(_vvv_ >> 24); }
 
+#endif
+
+
+#ifndef MY_CPU_LE_UNALIGN_64
+
+#define GetUi64(p) (GetUi32(p) | ((UInt64)GetUi32(((const Byte *)(p)) + 4) << 32))
+
 #define SetUi64(p, v) { Byte *_ppp2_ = (Byte *)(p); UInt64 _vvv2_ = (v); \
     SetUi32(_ppp2_    , (UInt32)_vvv2_); \
     SetUi32(_ppp2_ + 4, (UInt32)(_vvv2_ >> 32)); }
 
 #endif
 
+
+
+
 #ifdef __has_builtin
   #define MY__has_builtin(x) __has_builtin(x)
 #else
@@ -392,6 +407,7 @@ int x86cpuid_GetFirm(const Cx86cpuid *p);
 BoolInt CPU_Is_InOrder(void);
 
 BoolInt CPU_IsSupported_AES(void);
+BoolInt CPU_IsSupported_AVX2(void);
 BoolInt CPU_IsSupported_VAES_AVX2(void);
 BoolInt CPU_IsSupported_SSSE3(void);
 BoolInt CPU_IsSupported_SSE41(void);
@@ -401,6 +417,7 @@ BoolInt CPU_IsSupported_PageGB(void);
 #elif defined(MY_CPU_ARM_OR_ARM64)
 
 BoolInt CPU_IsSupported_CRC32(void);
+BoolInt CPU_IsSupported_NEON(void);
 
 #if defined(_WIN32)
 BoolInt CPU_IsSupported_CRYPTO(void);